[PATCH] ARM: edma: Fix configuration parsing for SoCs with multiple eDMA3 CC

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[PATCH] ARM: edma: Fix configuration parsing for SoCs with multiple eDMA3 CC

Peter Ujfalusi
The edma_setup_from_hw() should know about the CC number when parsing the
CCCFG register - when it reads the register to be precise. The base
addresses for CCs stored in an array and we need to provide the correct id
to edma_read() in order to read the correct register.

Cc: <[hidden email]> # 3.16
Signed-off-by: Peter Ujfalusi <[hidden email]>
---
 arch/arm/common/edma.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 88099175fc56..d86771abbf57 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -1443,14 +1443,14 @@ void edma_assign_channel_eventq(unsigned channel, enum dma_event_q eventq_no)
 EXPORT_SYMBOL(edma_assign_channel_eventq);
 
 static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
-      struct edma *edma_cc)
+      struct edma *edma_cc, int cc_id)
 {
  int i;
  u32 value, cccfg;
  s8 (*queue_priority_map)[2];
 
  /* Decode the eDMA3 configuration from CCCFG register */
- cccfg = edma_read(0, EDMA_CCCFG);
+ cccfg = edma_read(cc_id, EDMA_CCCFG);
 
  value = GET_NUM_REGN(cccfg);
  edma_cc->num_region = BIT(value);
@@ -1464,7 +1464,8 @@ static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
  value = GET_NUM_EVQUE(cccfg);
  edma_cc->num_tc = value + 1;
 
- dev_dbg(dev, "eDMA3 HW configuration (cccfg: 0x%08x):\n", cccfg);
+ dev_dbg(dev, "eDMA3 CC%d HW configuration (cccfg: 0x%08x):\n", cc_id,
+ cccfg);
  dev_dbg(dev, "num_region: %u\n", edma_cc->num_region);
  dev_dbg(dev, "num_channel: %u\n", edma_cc->num_channels);
  dev_dbg(dev, "num_slot: %u\n", edma_cc->num_slots);
@@ -1684,7 +1685,7 @@ static int edma_probe(struct platform_device *pdev)
  return -ENOMEM;
 
  /* Get eDMA3 configuration from IP */
- ret = edma_setup_from_hw(dev, info[j], edma_cc[j]);
+ ret = edma_setup_from_hw(dev, info[j], edma_cc[j], j);
  if (ret)
  return ret;
 
--
2.0.2

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Re: [PATCH] ARM: edma: Fix configuration parsing for SoCs with multiple eDMA3 CC

Vinod Koul-3
On Mon, Aug 04, 2014 at 03:26:56PM +0300, Peter Ujfalusi wrote:
> The edma_setup_from_hw() should know about the CC number when parsing the
> CCCFG register - when it reads the register to be precise. The base
> addresses for CCs stored in an array and we need to provide the correct id
> to edma_read() in order to read the correct register.

Just an othognal question:

I still see lot of code for edma in arm/. What is the plan to re/move that
to dma/

--
~Vinod

>
> Cc: <[hidden email]> # 3.16
> Signed-off-by: Peter Ujfalusi <[hidden email]>
> ---
>  arch/arm/common/edma.c | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> index 88099175fc56..d86771abbf57 100644
> --- a/arch/arm/common/edma.c
> +++ b/arch/arm/common/edma.c
> @@ -1443,14 +1443,14 @@ void edma_assign_channel_eventq(unsigned channel, enum dma_event_q eventq_no)
>  EXPORT_SYMBOL(edma_assign_channel_eventq);
>  
>  static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
> -      struct edma *edma_cc)
> +      struct edma *edma_cc, int cc_id)
>  {
>   int i;
>   u32 value, cccfg;
>   s8 (*queue_priority_map)[2];
>  
>   /* Decode the eDMA3 configuration from CCCFG register */
> - cccfg = edma_read(0, EDMA_CCCFG);
> + cccfg = edma_read(cc_id, EDMA_CCCFG);
>  
>   value = GET_NUM_REGN(cccfg);
>   edma_cc->num_region = BIT(value);
> @@ -1464,7 +1464,8 @@ static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
>   value = GET_NUM_EVQUE(cccfg);
>   edma_cc->num_tc = value + 1;
>  
> - dev_dbg(dev, "eDMA3 HW configuration (cccfg: 0x%08x):\n", cccfg);
> + dev_dbg(dev, "eDMA3 CC%d HW configuration (cccfg: 0x%08x):\n", cc_id,
> + cccfg);
>   dev_dbg(dev, "num_region: %u\n", edma_cc->num_region);
>   dev_dbg(dev, "num_channel: %u\n", edma_cc->num_channels);
>   dev_dbg(dev, "num_slot: %u\n", edma_cc->num_slots);
> @@ -1684,7 +1685,7 @@ static int edma_probe(struct platform_device *pdev)
>   return -ENOMEM;
>  
>   /* Get eDMA3 configuration from IP */
> - ret = edma_setup_from_hw(dev, info[j], edma_cc[j]);
> + ret = edma_setup_from_hw(dev, info[j], edma_cc[j], j);
>   if (ret)
>   return ret;
>  
> --
> 2.0.2
>

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Re: [PATCH] ARM: edma: Fix configuration parsing for SoCs with multiple eDMA3 CC

Peter Ujfalusi
On 08/05/2014 07:32 PM, Vinod Koul wrote:

> On Mon, Aug 04, 2014 at 03:26:56PM +0300, Peter Ujfalusi wrote:
>> The edma_setup_from_hw() should know about the CC number when parsing the
>> CCCFG register - when it reads the register to be precise. The base
>> addresses for CCs stored in an array and we need to provide the correct id
>> to edma_read() in order to read the correct register.
>
> Just an othognal question:
>
> I still see lot of code for edma in arm/. What is the plan to re/move that
> to dma/

Yes, there's still a big split. The code under arch/arm/common/ provides still
the 'legacy' edma API. This is still used by audio
sound/soc/davinci/davinci-pcm for older daVinci devices (AM335x. AM43xx uses
the edma-pcm).

And it is not that simple to deprecate davinci-pcm: it can use so called
ping-pong mode for audio data transfer. This mode is not possible via
dmaengine AFAIK.
I'm going to check if edma-pcm would work fine instead of the ping-pong mode.
If it does I can remove davinci-pcm and we can start cleaning up the edma code.

--
P├ęter
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Re: [PATCH] ARM: edma: Fix configuration parsing for SoCs with multiple eDMA3 CC

Sekhar Nori
In reply to this post by Peter Ujfalusi
On Monday 04 August 2014 05:56 PM, Peter Ujfalusi wrote:
> The edma_setup_from_hw() should know about the CC number when parsing the
> CCCFG register - when it reads the register to be precise. The base
> addresses for CCs stored in an array and we need to provide the correct id
> to edma_read() in order to read the correct register.
>
> Cc: <[hidden email]> # 3.16
> Signed-off-by: Peter Ujfalusi <[hidden email]>

Applied and will queue for v3.17-rc

Thanks,
Sekhar
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